Matjaz Vidmar, S53MV
13cm PSK Transceiver for 1.2Mbits/s Packet radio; Part-1
VHF Communications 3/1996
The choice of a transceiver design for high-speed packet radio is
not simple. Is it better to use an apparently simpler FM transceiver
or to go for a more sophisticated PSK transceiver? Both choices have
their advantages and disadvantages and at this time it is difficult
to predict which one will become more practical. However, increasing
the transmission speed both the signal bandwidth and the radio range
need to be considered.
1. INTRODUCTION
Increasing the data speed beyond about 100kbit/s, the resulting signal
bandwidth is only acceptable at microwave frequencies. The transmitter
power available at microwave frequencies is small and expensive. Therefore
the radio range becomes a limitation even for line-of-sight terrestrial
packet-radio links. A PSK transceiver with a coherent detector offers
a radio range that is between 5dB and 15dB larger and a signal bandwidth
that is less than half when compared with a FM transceiver.
In packet radio the main problem of a PSK transceiver is the initial
RX signal acquisition. The latter is a function of the carrier frequency
uncertainty. In a simple biphase PSK (BPSK) system with 0/180° modulation,
the initial signal acquisition requires a complicated searching loop,
if the frequency error exceeds 10% of the bit rate. Quadriphase PSK
(QPSK) allows a further halving of the signal bandwidth at the expense
of a much more sophisticated demodulator design and an even more critical
initial signal acquisition.
Therefore PSK becomes simple at high data rates. On the other hand,
the signal acquisition of low-Earth orbit amateur packet-radio satellites
transmitting at only 1200bit/s PSK is very difficult. This unfortunate
PSK design made radio amateurs believe that PSK is not suitable for
packet radio, being just an unnecessary complication at low data rates
like 1200bit/s.
In this article a successful 13cm BPSK transceiver design will be
described. In the 13cm amateur band, the sum of the frequency uncertainties
of both receiver and transmitter is at least 10 kHz using top quality
temperature-compensated crystal oscillators. A real-world figure is
100 kHz frequency uncertainty that requires a MINIMUM bit rate of
about 1Mbit/s!
With the above restriction, a convenient choice is to use 1.2288Mbit/s
for packet radio. This figure can easily be obtained with standard
baud-rate crystals, being the 32nd multiple of 38.4kbit/s or the 1024th
multiple of 1200bit/s. Of course the described transceiver can also
be used for other digital data transmissions that require megabit
rates, like compressed digital television transmission.
2. 13cm PSK TRANSCEIVER DESIGN
Since the above mentioned PSK modulation is relatively unknown to
most radio amateurs, the 13cm PSK transceiver block diagram will be
discussed first. The same form of PSK modulation, namely 0/180° BPSK,
allows many different transceiver concepts.
For example, a PSK signal may be generated at an IF frequency and
then upconverted to the final transmitter frequency. A PSK signal
can also be generated directly at the final frequency and even after
the transmitter power amplifier. Finally, a PSK signal can also be
fed through frequency multiplier stages, but here one should not forget
that the PSK modulation phase angles are multiplied by exactly the
same factors as the carrier frequency.
A PSK demodulator may be coherent or non-coherent. A coherent PSK
demodulator offers a larger radio range, but requires a local carrier
regeneration. A PSK signal is demodulated coherently by multiplication
with the regenerated carrier in a balanced mixer. Carrier regeneration
requires a non-linear processing of the PSK signal (in the case of
BPSK this may be a frequency doubler) and a narrow bandpass filter
(usually in the form of a phase-locked loop).
A PSK signal may be demodulated at a convenient IF frequency or directly
at the receiver input frequency. A PSK receiver can be designed as
a direct-conversion receiver just like a SSB receiver. Carrier regeneration
may be performed by a squaring loop (frequency doubler) or by a Costas
loop. Just like SSB, all PSK demodulators are very sensitive to small
carrier frequency inaccuracies.
The block diagram of the described 13cm PSK transceiver is shown in
Fig.1. The transmitter includes a crystal oscillator followed by a
multiplier chain. The PSK modulator - - balanced mixer operates at
the final transmitter frequency and generates the desired signal directly.
Modern semiconductor devices provide high gains per stage.
The receiver includes a double down-conversion with the corresponding
intermediate frequencies of 75 MHz and 10 MHz. The 10 MHz coherent
PSK demodulator is a squaring loop PLL.
Although the receiver and the transmitter circuits are almost completely
independent, the 13cm PSK transceiver is intended for standard CSMA
(carrier-sense multiple access) simplex operation as usual for packet
radio. Therefore the transceiver includes a PIN antenna switch and
all of the remaining RX/TX switching is completely electronic as well.
The RX/TX switching delay is in the range of 2ms and is mainly caused
by the turn-on delay of the transmitter crystal oscillator.
3. TX EXCITER 590 MHz / +10dBm
The circuit diagram of the transmitter exciter is shown in Fig.2.
The exciter includes a crystal oscillator operating around 18.4 MHz,
followed by a multiplier chain. The exciter includes multiplier stages
up to 590 MHz. These are followed by additional multipliers located
in the following module, the PSK modulator, mainly because of the
different construction technology. A PLL synthesiser is not recommended
in the exciter, since it was found difficult to isolate the PSK modulator
from pulling the VCO frequency.
The oscillator uses a fundamental resonance crystal, since fundamental
resonances have a lower Q than overtone resonances. The turn-on delay
of the transmitter crystal oscillator can be reduced in this way.
The transmitter crystal oscillator is turned off when receiving, since
its fourth harmonic could disturb the first IF at 75 MHz. For operation
at 2360 MHz, a “computer” crystal for 18.432 MHz can be tuned to the
desired frequency with a series capacitive trimmer. Using different
crystals for other frequencies, a series inductor L1 may be required
in place of the capacitive trimmer.
The oscillator transistor is also used as the first multiplier, since
the output circuit (L2 and L3) is tuned to the fourth harmonic of
the oscillator frequency. Three additional frequency-doubler stages
are required to obtain about 10mW at 590 MHz. The first doubler stage
uses air-wound, self-supporting coils L4 and L5, while the remaining
two doubler stages use “printed” inductors L6, L7, L8 and L9. The
supply voltage for the oscillator and the first doubler stage is stabilised
by a 8V2 Zener diode.
The transmitter exciter is built on a single-sided PCB with the dimensions
of 40mm x 120mm, as shown in Fig.3. The PCB is made of 0.8mm thick
glass-fibre-epoxy laminate to shorten the wire leads of the components
and in this way reduce the parasitic inductances. The component location
of the transmitter exciter is shown in Fig.4.
L2 and L3 have about 150nH each or 4 turns each of 0.25mm thick
copper-enamelled wire. They are wound on 36 MHz (TV IF) coil formers
with a central adjustable ferrite screw, plastic cap and 10mm x 10mm
square shield. L4 and L5 are self-supporting coils with 4 turns each
of 1mm thick copper-enamelled wire, wound on an internal diameter
of 4mm. Finally, L6, L7, L8 and L9 are etched on the PCB.
The transmitter exciter is simply tuned for the maximum output power.
The individual stages are tuned to obtain the maximum drop of the
DC voltage on the base of the next-stage transistor. Of course,
the base voltage has to be measured through a RF choke. The base voltage
may become negative, but should not exceed -1V. Finally, the crystal
oscillator is tuned to the desired frequency with the corresponding
capacitive trimmer (or L1).
4. 2360 MHz PSK MODULATOR
The circuit diagram of the 2360 MHz PSK modulator is shown in Fig.5.
Except for the modulator (balanced mixer) itself, the module includes
the last frequency-doubler stage, bandpass filters for 590 MHz, 1180
MHz and 2360 MHz and an output amplifier stage to boost the signal
level to about 15mW. All of the filters and other frequency-selective
components are made as micro-strip resonators on a 1.6mm thick glass-fibre-epoxy laminate FR4.
The input resonator (L1) functions as an open circuit for the input
frequency (590 MHz) and as a short circuit for the output frequency (1180 MHz) of the frequency doubler. In this way the operation of the doubler is less sensitive to the exact cable length and output impedance of the exciter. The output bandpass (L3, L4, L5 and L6) should not only suppress the input frequency (590 MHz) but also its fourth harmonic (2360 MHz) that could disturb the symmetry of balanced mixer resulting in an unsymmetrical, distorted PSK.
A harmonic mixer with antiparallel diodes is used as the PSK modulator,
since this circuit provides a reasonable unwanted carrier suppression
(25dB) without any special tuning and without access to expensive
test equipment (spectrum analyser). The harmonic mixer uses a quad
Schottky diode BAT14-099R, since four diodes provide a higher output
signal level than just two antiparallel diodes.
The mixer is followed by a bandpass filter for 2360 MHz (L11, L12,
L13 and L14) to remove the 1180 MHz driving signal and other unwanted
mixing products far away from the 13cm frequency band. The generated
PSK signal at 2360 MHz does not require any filtering itself.
Since the 2360 MHz signal level is low, about 0.3mW, a GaAsFET amplifier
stage (CFY30) is used to raise the signal level to about 15mW.
The PSK modulator is built on a double-sided PCB with the dimensions
of 40mm x 120mm. Only the upper side is shown in Fig.6, since the
lower side functions as the micro-strip groundplane and is not etched.
The PCB is made of 1.6mm thick glass-fibre-epoxy laminate FR4, although
this material has substantial RF losses at 2.36 GHz. The component
location of the PSK modulator is shown in Fig.7 for both sides of
the PCB.
Although most of the transmission lines are etched on the PCB, L2,
L9 and L15 are air-wound quarter-wavelength chokes. L2 is a quarter-wavelength choke for 1180 MHz, L15 is a quarter-wavelength choke for 2360 MHz while L9 should be a quarter-wavelength somewhere in the middle (around 1700 MHz), since it has to be effective for both frequencies.
The described PSK modulator can simply be tuned for the maximum output
signal level. Besides the 590 MHz exciter signal, a digital modulating
signal is required as well. The latter may be a square wave of the
appropriate frequency or better the real digital packet-radio signal.
Without any alignment, the PSK modulator will already provide an output
of a few milliwatts. After any alignment of the micro-strip resonators
one has to check the modulation signal level to find the best operating
condition of the harmonic mixer.
5. 2360 MHz RF FRONT-END
The circuit diagram of the 2360 MHz RF front-end is shown in Fig.8.
The RF front-end includes the transmitter power amplifier, the receiver
low-noise preamplifier and the PIN antenna switch. The RF front-end
is the only module including micro-strip circuits, that is built on
a low-loss, 0.8mm thick glass-fibre-Teflon laminate with a dielectric
constant of 2.5.
The circuit of the RF front-end is simplified by using modern SMD
semiconductor devices, originally developed for cellular telephones.
The transmitter power amplifier uses a single GaAs transistor CLY2
that provides both 15dB gain and more than 500mW of output power at
the same time. Just a few years ago, an equivalent circuit would require
three or four silicon bipolar transistors. The CLY2 is a low-voltage
power GaAsFET that operates at a drain voltage of just 4.5V, while
generating its own negative gate bias voltage by rectifying the input
RF signal.
The antenna switch includes two different PIN diodes: BAR63-03W and
BAR80. The semiconductor chips of these two diodes are similar, but
there is an important difference the packages. The BAR63-03W is built
in a standard microwave SMD diode package with a low parasitic capacitance
and is used as a series switch. On the other hand, the BAR80 diode
is built in a low parasitic inductance package and is used as a shunt
switch. Both diodes are turned on while transmitting. The quarter-wavelength
line L7 transforms the BAR80 short circuit into an open circuit for
the transmitter.
The RF front-end also includes a low-noise receiving preamplifier
to improve the sensitivity and image rejection of the receiver. The
low-noise preamp uses a CFY35 transistor, followed by a bandpass filter.
The preamplifier provides a gain of about 11dB including the antenna
switch and output filter losses. The bandpass filter is required to
attenuate the image response around 2210 MHz.
The RF front-end is built on a double-sided Teflon PCB with the dimensions
of 40mm x 80mm. Only the upper side is shown in Fig.9, since the lower
side functions as the micro-strip groundplane and is not etched. The
PCB is made of 0.8mm thick glass-fibre-Teflon laminate with a dielectric
constant of 2.5. The component location of the RF front-end is shown
in Fig.10 for both sides of the PCB. Except the printed micro-strip
lines, there are three air-wound quarter-wavelength chokes for 2360
MHz: L3, L5 and L8.
Assembling the RF front-end, the most critical item is the correct
grounding of the microwave semiconductors CLY2, BAR80 and CFY35. The
CLY2 and the BAR80 are grounded through drops of solder, deposited
in 2mm diameter holes at the marked positions in the Teflon laminate.
On the groundplane side these holes are covered with small pieces
of copper sheet that also act as heat sinks for these semiconductors.
The CFY35 is grounded through two leadless ceramic disk capacitors
installed in 5.5mm diameter holes at the marked positions. The capacitors
are connected to the groundplane with small pieces of copper sheet
on the other side. Finally, L6 is grounded with a 2.5mm wide strip
of copper foil inserted in a slot in the Teflon laminate.
The transmitter power amplifier is simply tuned for the maximum output
power by adding capacity (small pieces of copper foil) to L1. Small
sheets of copper foil can also be added in other parts of the circuit,
but their influence is usually small when compared to L1. If the specified
output power can not be obtained, the cable length between the PSK
modulator and RF front-end needs to be changed.
The receiving preamplifier is also tuned for the maximum gain, but
here it is more important to bring the bandpass filter to the correct
frequency. The latter is adjusted with L11, while L10 only affects
the CFY35 output impedance matching. Before making any RF adjustments,
the DC operating point of the CFY35 has to be set by selecting appropriate
source bias resistors for a Vds of 3-4V.
6. RX CONVERTER WITH PLL LO
To avoid several multiplier stages the receiving converter includes
a microwave PLL frequency synthesiser. The converter is built as two
separate modules to prevent the digital part from disturbing the low-level
analogue circuits. Of course each module is shielded on its own. The
described RX converter is derived from a 2400 MHz SSB converter published
in [1].
The circuit diagram of the analogue section of the RX converter is
shown in Fig.11. The analogue section includes the second RF amplifier
stage, the sub-harmonic mixer, the VCO including a buffer stage and
the first 75 MHz IF amplifier. The analogue circuits are built as
micro-strip circuits on a 1.6mm thick glass-fibre-epoxy laminate.
The main function of the second RF amplifier is to cover the noise
figure of the harmonic mixer. The second RF amplifier is followed
by another bandpass filter (L3, L4, L5 and L6), but unfortunately
due to the high substrate losses this filter is unable to provide
any significant rejection of the image frequency at 2210 MHz. Its
main purpose is to reject far-away interferences like sub-harmonics
or even signals at the IF frequency.
The harmonic mixer uses two antiparallel Schottky diodes and is very
similar to the PSK modulator. Such a mixer requires a local oscillator
at half of the required conversion frequency thus simplifying the
design of the PLL synthesiser. The resulting IF signal is amplified
immediately to avoid any further degradation of the already poor noise
figure.
The VCO uses a micro-strip bandpass filter (L13, L14 and L15) in the
feedback network to obtain low phase noise. The tuning range of this
VCO is thus restricted to a few percent of the central frequency.
The VCO is followed by a buffer stage and part of the buffered VCO
signal is coupled by L10, L11 to feed the digital section of the PLL.
The analogue section of the receiving converter is built on a double
sided PCB with the dimensions of 40mm x 120mm. Only the upper side
is shown in Fig.12, since the lower side functions as the micro-strip
groundplane and is not etched. The PCB is made of 1.6mm thick glass-fibre-epoxy laminate FR4, although this material has substantial losses at 2.36 GHz. The component location of the analogue section of the RX converter is shown in Fig.13 for both sides of the PCB.
Although most of the transmission lines are etched on the PCB, there
are two discrete inductors in this module. L2 is a wire loop with
a 2mm internal diameter made of 0.6mm thick silver-plated copper wire.
L2 may need adjustments during the alignment of the complete transceiver.
L8 is a quarter-wavelength choke around 1700 MHz to be effective for
both the RF and LO frequencies.
Most of the RF active devices (BFR90, BFR91 and BB105) are installed
in 6mm diameter holes in the PCB. These holes are afterwards covered
on the groundplane side by soldering small pieces of copper foil.
The same installation procedure also applies to the two 470pF source
bypass capacitors for the CFY30 transistor. The corresponding source
bias resistors are adjusted for a Vds of 3-4V.
The alignment of the analogue section should start with bringing the
VCO to the desired frequency range by adjusting L14. This is done
easily if the PLL is already operating. L14 usually needs to be made
slightly longer to obtain a 2.5V PLL control voltage in the locked
condition. Then L7 is adjusted for the maximum mixer conversion gain
and finally L4 and L5 may need some small adjustments. L1 and L2 should
be adjusted to match the RF front-end. If the second RF stage (CFY30)
is self-oscillating, the L2 wire loop has to be made shorter.
An alternative solution is to replace the CFY30 GaAsFET with the silicon
MMIC INA-03184. The latter has a higher noise figure but offers more
gain and does not self oscillate. When using the INA-03184, L2 has
to be replaced with a 6.8pF capacitor, the output bias resistor has
to be increased from 470W up to 680W and the source bypass capacitors
and bias resistors are no longer required, since the two INA-03184
common pins can be grounded in a straightforward way.
The circuit diagram of PLL section of the RX converter is shown in
Fig.14. The PLL includes the /64 prescaler (U664), the reference crystal
oscillator at about 8.9 MHz, two additional dividers (HC393) and the
frequency/phase comparator (HC74 and HC00). The PLL module has its
own 5V supply voltage regulator 7805.
The above mentioned PLL is intended to replace a chain of frequency
multipliers. Therefore it does not contain variable modulo dividers.
The multiplication ratio is fixed to 128 (256 when considering the
harmonic mixer) and the crystal frequency has to be selected according
to the desired RF channel. In the frequency range around 8.9 MHz,
a “CB” crystal can usually be used on its fundamental resonance. Due
to the wide tolerances of CB crystals either a capacitive trimmer
or a series inductor L1 may be required to bring the crystal to the
desired frequency. For operation at 2360 MHz, the best choice is a
crystal for 26.770 MHz (CB channel 22 RX).
The frequency/phase comparator drives a charge-pump output network.
The correct operation of such comparators is limited to low frequencies.
Therefore both the VCO and reference signals have to be divided down
to about 2.2 MHz when using 74HC logic in the frequency/phase
comparator. Fast (Schottky) diodes BAT47 are required in the charge-pump
network to avoid backlash problems that seriously deteriorate the
phase noise of the frequency synthesiser.
The only adjustment of the PLL is to bring the crystal oscillator
to the required frequency. The PLL lock test point is not brought
out of the shielding enclosure since it is only required during the
adjustment of the PLL.
To be continued